Submission deadline: CLOSED
Publication: September/October 2017
Guest editors: Bronis R. de Supinski, John R. Neely, and Charles H. Still, Lawrence Livermore National Laboratory
For the first time in several decades, high performance computing (HPC) application developers face a broad-based paradigm shift in how HPC platforms are designed and deployed in the march toward exascale computing. There is a continued need for increased performance — something to which we have grown accustomed over the past six decades — but HPC software and application development is now complicated by technology concerns related to power, parallelism, and resilience.
The process of co-design was born out of the realization that achieving good performance at exascale will require a new level of coordination within the HPC ecosystem. Technologies such as massively multicore CPUs and heterogeneous architectures are answering the need for speed in hardware, but require application developers to handle the commensurate complexity of uncovering massive amounts of fine-grained parallelism. Developers must also consider that the memory wall has finally manifested itself with data motion, replacing floating point performance as the typical application bottleneck. Therefore, application developers must now deeply understand diverse architectures, while architects of hardware and the supporting software stack and programming model and language standards must continue to deliver innovations that will ease this transition with minimal disruption. The relatively stable architectures and programming models of the past two and a half decades have allowed application users to focus primarily on scientific discovery. The end of this trend could force these often large, complex, and validated applications to make major changes that divert these users from their primary purpose.
This special issue will explore how leading organizations plan to approach this disruption. Whether the goal is to focus on new core algorithms for extreme parallelism and resilience, to insulate applications from the underlying hardware details, to leverage legacy applications and existing standards for as long as possible, to develop new applications from scratch, or some combination of these approaches, the risks of remaining at the forefront must be carefully managed to avoid nearly continuous refactoring and rewriting that takes away from the end goal of scientific discovery.
We invite scientists and engineers to submit original papers that describe their approach to application modernization. Areas of interest include, but are not limited to:
- development of new “centers of excellence,”
- performance portability and productivity, and
- practical co-design.
We are particularly interested in broad-based strategies developed within a vertically integrated facility to support leadership class platforms, software stack development, research and development, and mission-critical applications.
Submission Guidelines
See https://www.computer.org/web/peer-review/magazines for general author guidelines. Articles submitted to Computing in Science & Engineering should not exceed 7,200 words, including all main body, abstract, keyword, bibliography, biography, and table text. Each table and figure counts for 250 words. Manuscripts should be submitted electronically (https://mc.manuscriptcentral.com/cs-ieee), selecting this special-issue option.
Questions?
Contact the guest editors at cise5-2017@computer.org.